HC10 (1998)

Date August 16-18, 1998
Place Memorial Auditorium, Stanford University
Program Final Program PDF
Committees Not Available

Tutorials

Tutorials Sunday, August 16, 1998
Morning Tutorial
08:30-12:00
Intellectual Property Law as Applied to the Computer and Electronic Industrties 
Chair: Margaret Jane Radin, William Benjamin Scott, Luna M. Scott, Professor of Law, Stanford Law School
Afternoon Tutorial
13:00-17:00
Fast CPUs are Good… but Fast I/O is Better 
Chair: Fred Berkowitz, Silicon Graphics Peripherals Team
 

Conference Day One

Session Monday, August 17, 1998
Opening Remarks
09:00-09:15
General Chair: Allen Baum PDF
Program Co-Chairs: John Wawrzynek, Norm Jouppi PDF
Session 1
09:15-10:45
High Performance Processors (Part 1) 
Chair: Monica Lam
The Alpha 21264 Microprocessor: Out-of-Order Execution at 600MHz, Richard E Kessler (Compaq) PDF

UltraSPARC-III: A 600MHz 64-bit Superscalar Processor for 1000-way Scalable Systems, Gary Lauterbauch (Sun Microsystems) PDF

Techniques for Mitigating Memory Latency in the PA-8500 Processor, David Johnson (Hewlett-Packard) PDF

Session 2
11:15-12:45
Embedded and Embeddable Processors 
Chair: Kazuaki Murakami 

M32Rx/D – A Single Chip Microcontroller with a High Capacity 4MB Internal DRAM, Toru Shimizu (Mitsubishi) PDF

Genesis Microprocessor, Jack Choquette (SandCraft, Inc.) PDF

Keynote 1
14:00-14:45
Chair: Monica Lam 

Speaker: Greg Papadopoulos, Chief Technology Officer, Sun Microsystems

Session 4 
14:45-15:45
Specialized Chips 
Chair: Alan SmithDesigning a Single Chip Chess Grandmaster While Knowing Nothing About Chess, Feng-hsiung Hsu (IBM) PDF

Accelerating Cryptography in Hardware, Mark Birman (Hi/fn) PDF

The EMU10K1 Digital Audio Processor, Tom Savell (E-mu Systems, Inc.) PDF

Session 5 
16:15-17:45
High Performance Processors (Part 2) 
Chair: Mark TremblayIBM S/390 G5 Microprocessor, Timothy J. Slegel (IBM) PDF

A CMOS Vector Processor with a Custom Streaming Cache, Greg Faanes (Silicon Graphics, Inc.) PDF

AltiVec™ Technology: A Second Generation SIMD Microprocessor Architecture, Michael Philip (Motorola) PDF

Panel Discussion
19:30-21:30
Confronting the Microsoft Challenge 
Moderators: John H. Wharton

Conference Day Two

Session Tuesday, August 18, 1998
Session 7 
09:00-10:30
MPEG and Digital TV 
Chair: Gert SlavenburgA Single-chip MPEG2 MP@ML Video Encoder with Multi-chip Configuration for a Sinlge-board MP@HL Encoder, Toshihiro Minami (Nippon Telegraph and Telephone Corp) PDF

A Single-Chip DTV Media Processor, Selliah Rathnam (Trimedia Product Group) PDF

Two Chipsets for DTV Compliant with ATSC Standard, Hee-Bok Park (LG Electronics) PDF

Session 8 
11:00-12:30
General Purpose Processors with Integrated Media Support 
Chair: Kunle Olukotun 

MXi: A High Performance x86 Processor with Integrated 3D Graphics, Rajeev Jayavant (Cyrix) PDF

Novel Multimedia Instruction Capabilities in VLIW Media Processors, J.T.J van Eijndhoven (Philips Research Labs) PDF

SA-1500: A 300MHz RISC CPU with Attached Media Processor, Prashant P. Gandhi (Intel) PDF

Session 9 
14:00-15:30
Graphics Accelerators
Chair: 
Bill Dally 

Blitzen: Lightning Speed 3D Geometry Accelerator, Alan Krech (Hewlett-Packard) PDF

Neon: A Big, Fast, 3D Workstation Graphics Accelerator, Joel McCormack (Mitsubishi) PDF

VelaTX – Innovative 3D Architecture Coupled with Embedded DRAM Architecture, Joseph C. Del Rio (Stellar Semiconductor) PDF

Session 10 
16:00-17:00
High Performance PC Processors 
Chair: Ruby LeeIntel i740 Graphics Accelerator, Tom Piazza (Intel)

PERMEDIA 3 – A Third Generation Graphics Controller for the Mainstream PC and DirectX, Neil Trevett (3Dlabs)

AMD 3DNow! Technology and K6-2 Microprocessor, Stuart Oberman (AMD) PDF